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E2E0024-38-95
Semiconductor MSM63182
Semiconductor
This version: MSM63182 Sep. 1998 Previous version: Mar. 1996
4-Bit Microcontroller with Built-in 512-Dot Matrix LCD Drivers, Operating at 0.9 V (Min.)
GENERAL DESCRIPTION
The MSM63182 is a CMOS 4-bit microcontroller with built-in 512-dot matrix LCD drivers and operates at 0.9 V (min.). The MSM63182 is suitable for applications such as games, toys, watches, etc. which are provided with an LCD display. The MSM63182 is an M6318x series mask ROM-version product of OLMS-63K family, which employs Oki's original CPU core nX-4/250. The MSM63P180 is the one-time-programmable ROM version of MSM63188, having one-time PROM (OTP) as internal program memory. The MSM63P180 is used to evaluate the software development.
FEATURES
* Rich instruction set 439 instructions Transfer, rotate, increment/decrement, arithmetic operations, comparison, logic operations, mask operations, bit operations, ROM table reference, external memory transfer, stack operations, flag operations, branch, conditional branch, call/return, control. * Rich selection of addressing modes Indirect addressing of four data memory types, with current bank register, extra bank register, HL register and XY register. Data memory bank internal direct addressing mode. * Processing speed Two clocks per machine cycle, with most instructions executed in one machine cycle. Minimum instruction execution time : 61 ms (@ 32.768 kHz system clock) 1 ms (@ 2 MHz system clock) * Clock generation circuit Low-speed clock High-speed clock
: 32.768 kHz crystal oscillator : 2 MHz (Max.) RC or ceramic oscillator select
* Program memory space 4K words Basic instruction length is 16 bits/1 word * Data memory space 384 nibbles * External data memory space 64 Kbytes (expandable by using an I/O port)
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Semiconductor * Stack level Call stack level Register stack level
MSM63182
: 8 levels : 16 levels
* I/O ports Input ports: Selectable as input with pull-up resistance/input with pull-down resistance/ high-impedance input Output ports: Selectable as P-channel open drain output/N-channel open drain output/ CMOS output/high-impedance output Input-output ports: Selectable as input with pull-up resistance/input with pull-down resistance/high-impedance input Selectable as P-channel open drain output/N-channel open drain output/CMOS output/high-impedance output Can be interfaced with external peripherals that use a different power supply than this device uses. Number of ports: Input port : 2 ports 4 bits Output port : 4 ports 4 bits Input-output port : 3 ports 4 bits * Buzzer function Buzzer output Buzzer output modes
: 0.946 to 5.461 kHz (adjustable in 15 steps) : Intermittent sound 1, 2; simple sound; continuous sound
* LCD driver Number of segments : 512 Max. (32 SEG 16 COM) 1/1 to 1/16 duty 1/4 or 1/5 bias (regulator built-in) Selectable as all-on mode/all-off mode/power down mode/normal display mode Adjustable contrast * Reset function Reset through RESET pin Power-on reset Reset by low-speed oscillation halt * Battery check Low-voltage supply check Criterion voltage
: Can be selected as 1.05 0.10 V, 1.30 0.15 V, 2.20 0.20 V or 2.80 0.30 V
* Power supply backup Backup circuit (voltage multiplier) enables operation at 0.9 V minimum
2/27
Semiconductor * Timers and counter Watchdog timer 1 Overflows in 2 sec. 100 Hz timer 1 Measurable in steps of 1/100 sec. 15-bit time base counter 1 1, 2, 4, 8, 16, 32, 64, and 128 Hz signals can be read * Interrupt sources External interrupt Internal interrupt
MSM63182
:2 : 6 (watchdog timer interrupt is a nonmaskable interrupt)
* Operating voltage When backup used
When backup not used
: 0.9 to 2.7 V (Low-speed clock operating) 1.2 to 2.7 V (Operating frequency: 300 to 500 kHz) 1.5 to 2.7 V (Operating frequency: 200 kHz to 1 MHz) : 1.8 to 5.5 V (Operating frequency: 300 to 500 kHz) 2.2 to 5.5 V (Operating frequency: 300 kHz to 1 MHz) 2.7 to 5.5 V (Operating frequency: 200 kHz to 2 MHz)
* Package: 128-pin plastic QFP (QFP128-P-1420-0.50-K) Chip
: (Product name: MSM63182-xxxGS-K) : (Product name: MSM63182-xxx) xxx indicates a code number.
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Semiconductor
MSM63182
BLOCK DIAGRAM
An asterisk (*) indicates the port secondary function. indicates that the power is supplied to the circuits corresponding to the signal names inside from VDDI (power supply for interface).
nX-4/250 TIMING CONTROL SP RSP INSTRUCTION DECODER CBR EBR ALU H X L Y C RA A G MIE Z BUS CONTROL D0-7* EXTMEM A0-15* RD* WR* IR PC
ROM 4KW
STACK CAL: 8-level REG: 16-level
RAM 384N BUZZER INT182 INT 1 RESET RST INT 4 TBC INPUT PORT
DATA BUS
BD BDB
P0.0-P0.3 P1.0-P1.3
TST1 TST2
TST BLD
P4.0-P4.3 OUTPUT PORT P5.0-P5.3 P6.0-P6.3 P7.0-P7.3
XT0 XT1 OSC0 OSC1 OSC
INT 1
100HzTC
INT 1
WDT P8.0-P8.3
VDDH VDD CB1 CB2 VDD1 VDD2 VDD3 VDD4 VDD5 C1 C2 VDDL BIAS LCD & DSPR BACK UP INT 1 I/O PORT
P9.0-P9.3 PA.0-PA.3
COM1-16 SEG0-31 VDDI VSS
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Semiconductor
MSM63182
PIN CONFIGURATION (TOP VIEW)
(NC) (NC) COM16 COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 VDDI BDB BD P7.0 P7.1 P7.2 (NC) (NC)
(NC) (NC) (NC) SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 (NC) (NC) (NC)
128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38
102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
(NC) (NC) (NC) P7.3 P6.0 P6.1 P6.2 P6.3 P1.0 P1.1 P1.2 P1.3 PA.0 PA.1 PA.2 PA.3 P9.0 P9.1 P9.2 P9.3 P8.0 P8.1 P8.2 P8.3 P0.0 P0.1 P0.2 P0.3 P4.0 P4.1 P4.2 P4.3 P5.0 P5.1 P5.2 (NC) (NC) (NC)
Note: Pins marked as (NC) are no-connection pins which are left open.
(NC) (NC) VSS VDD1 VDD2 VDD3 VDD4 VDD5 C1 C2 VDDH CB1 CB2 VDD VDDL OSC1 OSC0 RESET XT1 XT0 TST2 TST1 P5.3 (NC) (NC) (NC)
39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
128-Pin Plastic QFP
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Semiconductor
MSM63182
PAD CONFIGURATION
Pad Layout
72 XT0 71 XT1 70 RESET 69 OSC0 68 OSC1 67 VDDL 66 VDD 65 CB2 64 CB1 63 VDDH 62 C2 61 C1 60 VDD5 59 VDD4 58 VDD3 57 VDD2 56 VDD1 55 VSS 75 P5.3 74 TST1 73 TST2 P5.2 P5.1 P5.0 P4.3 P4.2 P4.1 P4.0 P0.3 P0.2 P0.1 P0.0 P8.3 P8.2 P8.1 P8.0 P9.3 P9.2 P9.1 P9.0 PA.3 PA.2 PA.1 PA.0 P1.3 P1.2 P1.1 P1.0 P6.3 P6.2 P6.1 P6.0 P7.3 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
54 SEG0 53 SEG1 52 SEG2 51 SEG3 50 SEG4 49 SEG5 48 SEG6 47 SEG7 46 SEG8 45 SEG9 44 SEG10 43 SEG11 42 SEG12 41 SEG13 40 SEG14 39 SEG15 38 SEG16 37 SEG17 36 SEG18 35 SEG19 34 SEG20 33 SEG21 32 SEG22 31 SEG23 30 SEG24 29 SEG25 28 SEG26 27 SEG27 26 SEG28 25 SEG29 24 SEG30 23 SEG31
Y
P7.2 P7.1 P7.0 BD BDB VDDI COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16
X
Chip Size Chip Thickness Coordinate Origin Pad Hole Size Pad Size Minimum Pad Pitch
: : : : : :
4.44 mm 4.92 mm 350 mm (typ.) Chip center 100 mm 100 mm 110 mm 110 mm 140 mm
Note: The chip substrate voltage is VSS.
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Semiconductor Pad Coordinates
MSM63182
Pad Pad Pad Pad No. Name X (m) Y (m) Pad No. Name X (m) Y (m) Pad No. Name X (m) Y (m) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 P7.2 P7.1 P7.0 BD BDB VDDI COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 -1547 -1407 -1267 -1090 -950 -810 -630 -490 -350 -210 -70 70 210 350 490 630 770 910 1050 1190 1330 1470 2075 2075 2075 2075 2075 2075 2075 2075 2075 2075 2075 2075 2075 2075 -2265 -2265 -2265 -2265 -2265 -2265 -2265 -2265 -2265 -2265 -2265 -2265 -2265 -2265 -2265 -2265 -2265 -2265 -2265 -2265 -2265 -2265 -2170 -2030 -1890 -1750 -1610 -1470 -1330 -1190 -1050 -910 -770 -630 -490 -350 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 VSS VDD1 VDD2 VDD3 VDD4 VDD5 C1 C2 VDDH CB1 CB2 VDD VDDL OSC1 OSC0 RESET XT1 XT0 2075 2075 2075 2075 2075 2075 2075 2075 2075 2075 2075 2075 2075 2075 2075 2075 2075 2075 1575 1425 1275 1125 975 825 675 525 375 225 75 -75 -225 -375 -525 -675 -825 -975 -210 -70 70 210 350 490 630 770 910 1050 1190 1330 1470 1610 1750 1890 2030 2170 2265 2265 2265 2265 2265 2265 2265 2265 2265 2265 2265 2265 2265 2265 2265 2265 2265 2265 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 TST2 TST1 P5.3 P5.2 P5.1 P5.0 P4.3 P4.2 P4.1 P4.0 P0.3 P0.2 P0.1 P0.0 P8.3 P8.2 P8.1 P8.0 P9.3 P9.2 P9.1 P9.0 PA.3 PA.2 PA.1 PA.0 P1.3 P1.2 P1.1 P1.0 P6.3 P6.2 P6.1 P6.0 P7.3 -1247 -1387 -1548 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 -2075 2265 2265 2265 2170 2030 1890 1750 1610 1470 1330 1190 1050 910 770 630 490 350 210 70 -70 -210 -350 -490 -630 -770 -910 -1050 -1190 -1330 -1470 -1610 -1750 -1890 -2030 -2170
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Semiconductor
MSM63182
PIN DESCRIPTIONS
The basic functions of each pin of the MSM63182 are described in Table 1. A symbol with a slash (/) denotes a pin that has a secondary function. Refer to Table 2 for secondary functions. For type, "--" denotes a power supply pin, "I" an input pin, "O" an output pin, and "I/O" an inputoutput pin. Table 1 Pin Descriptions (Basic Functions)
Function Symbol VDD VSS VDD1 VDD2 VDD3 VDD4 VDD5 Power Supply C1 C2 VDDI VDDL VDDH CB1 CB2 XT0 XT1 Oscillation OSC0 OSC1 TST1 Test TST2 59 I 55 54 60 I O I Pin 52 41 42 43 44 45 46 47 48 110 53 49 50 51 58 57 -- -- -- -- -- -- -- I O Capacitor connection pins for LCD bias generation. A capacitor (0.1 mF) should be connected between C1 and C2. Positive power supply pin for external interface (power supply for input, output, and input-output ports) Positive power supply pin for internal logic (internally generated). A capacitor (0.1 mF) should be connected between this pin and VSS. Voltage multiplier pin for power supply backup (internally generated). A capacitor (1.0 mF) should be connected between this pin and VSS. Pins to connect a capacitor for voltage multiplier. A capacitor (1.0 mF) should be connected between CB1 and CB2. Low-speed clock oscillation pins. A 32.768 kHz crystal should be connected between XT0 and XT1, and CG (5 to 25 pF) should be connected between XT0 and VSS. High-speed clock oscillation pins. A ceramic resonator and capacitors (CL0, CL1) or external oscillation resistor (ROS) should be connected to these pins. Input pins for testing. A pull-down resistor is internally connected to these pins. The user cannot use these pins. Reset input pin. Setting this pin to "H" level puts this device into a reset state. Reset RESET 56 I Then, setting this pin to "L" level starts executing an instruction from address 0000H. A pull-down resistor is internally connected to this pin. Buzzer BD BDB 108 109 O O Buzzer output pin (non-inverted output) Buzzer output pin (inverted output) -- Type -- -- Positive power supply Negative power supply Power supply pins for LCD bias (internally generated). Capacitors (0.1 mF) should be connected between these pins and VSS. Description
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Semiconductor Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol P0.0/INT5 P0.1/INT5 P0.2/INT5 P0.3/INT5 P1.0/INT5 P1.1/INT5 P1.2/INT5 P1.3/INT5 P4.0/A0 P4.1/A1 P4.2/A2 P4.3/A3 P5.0/A4 P5.1/A5 P5.2/A6 P5.3/A7 P6.0/A8 P6.1/A9 Port P6.2/A10 P6.3/A11 P7.0/A12 P7.1/A13 P7.2/A14 P7.3/A15 P8.0/RD P8.1/WR P8.2 P8.3/INT4 P9.0/D0 P9.1/D1 P9.2/D2 P9.3/D3 PA.0/D4 PA.1/D5 PA.2/D6 PA.3/D7 Pin 78 77 76 75 94 93 92 91 74 73 72 71 70 69 68 61 98 97 96 95 107 106 105 99 82 81 80 79 86 85 84 83 90 89 88 87 I/O I/O I/O 4-bit input-output ports. O O O O 4-bit output ports. I I Type 4-bit input ports. Description
MSM63182
Pull-up resistor input, pull-down resistor input, or high-impedance input is selectable for each bit.
P-channel open drain output, N-channel open drain output, CMOS output, or high-impedance output is selectable for each bit.
In input mode, pull-up resistor input, pull-down resistor input, or high-impedance input is selectable for each bit. In output mode, P-channel open drain output, N-channel open drain output, CMOS output, or high-impedance output is selectable for each bit.
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Semiconductor Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 SEG0 SEG1 SEG2 LCD SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 Pin 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 O LCD segment signal output pins O Type Description LCD common signal output pins
MSM63182
10/27
Semiconductor Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol SEG25 SEG26 SEG27 LCD SEG28 SEG29 SEG30 SEG31 Pin 10 9 8 7 6 5 4 O Type Description LCD segment signal output pins
MSM63182
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Semiconductor Table 2 shows the secondary functions of each pin of the MSM63182. Table 2 Pin Descriptions (Secondary Functions)
Function Symbol P8.3/INT4 P0.0/INT5 P0.1/INT5 External Interrupt P0.2/INT5 P0.3/INT5 P1.0/INT5 P1.1/INT5 P1.2/INT5 P1.3/INT5 Pin 79 78 77 76 75 94 93 92 91 I Type I Description External 4 interrupt input pin.
MSM63182
The change of input signal level causes an interrupt to occur. External 5 interrupt input pins. The change of input signal level causes an interrupt to occur. The Port 0 Interrupt Enable register (P0IE) and Port 1 Interrupt Enable register (P1IE) enable or disable an interrupt for each bit.
12/27
Semiconductor Table 2 Pin Descriptions (Secondary Functions) (continued)
Function Symbol P4.0/A0 P4.1/A1 P4.2/A2 P4.3/A3 P5.0/A4 P5.1/A5 P5.2/A6 P5.3/A7 P6.0/A8 P6.1/A9 P6.2/A10 External Memory P6.3/A11 P7.0/A12 P7.1/A13 P7.2/A14 P7.3/A15 P9.0/D0 P9.1/D1 P9.2/D2 P9.3/D3 PA.0/D4 PA.1/D5 PA.2/D6 PA.3/D7 P8.0/RD P8.1/WR Pin 74 73 72 71 70 69 68 61 98 97 96 95 107 106 105 99 86 85 84 83 90 89 88 87 82 81 O O I/O Data bus for external memory O Type Description Address output bus for external memory
MSM63182
Read signal output pin for external memory (negative logic) Write signal output pin for external memory (negative logic)
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Semiconductor
MSM63182
ABSOLUTE MAXIMUM RATINGS
(VSS = 0 V) Parameter Power Supply Voltage 1 Power Supply Voltage 2 Power Supply Voltage 3 Power Supply Voltage 4 Power Supply Voltage 5 Power Supply Voltage 6 Power Supply Voltage 7 Power Supply Voltage 8 Power Supply Voltage 9 Input Voltage 1 Input Voltage 2 Output Voltage 1 Output Voltage 2 Output Voltage 3 Output Voltage 4 Output Voltage 5 Output Voltage 6 Output Voltage 7 Output Voltage 8 Storage Temperature Symbol VDD1 VDD2 VDD3 VDD4 VDD5 VDD VDDI VDDH VDDL VIN1 VIN2 VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 VOUT6 VOUT7 VOUT8 TSTG Condition Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C VDD Input, Ta = 25C VDDI Input, Ta = 25C VDD1 Output, Ta = 25C VDD2 Output, Ta = 25C VDD3 Output, Ta = 25C VDD4 Output, Ta = 25C VDD5 Output, Ta = 25C VDD Output, Ta = 25C VDDI Output, Ta = 25C VDDH Output, Ta = 25C -- Rating -0.3 to +1.6 -0.3 to +2.9 -0.3 to +4.2 -0.3 to +5.5 -0.3 to +6.8 -0.3 to +6.0 -0.3 to +6.0 -0.3 to +6.0 -0.3 to +6.0 -0.3 to VDD + 0.3 -0.3 to VDDI + 0.3 -0.3 to VDD1 + 0.3 -0.3 to VDD2 + 0.3 -0.3 to VDD3 + 0.3 -0.3 to VDD4 + 0.3 -0.3 to VDD5 + 0.3 -0.3 to VDD + 0.3 -0.3 to VDDI + 0.3 -0.3 to VDDH + 0.3 -55 to +150 Unit V V V V V V V V V V V V V V V V V V V C
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Semiconductor
MSM63182
RECOMMENDED OPERATING CONDITIONS
* When backup is used
(VSS = 0 V) Parameter Operating Temperature Operating Voltage Crystal Oscillation Frequency Ceramic Oscillation Frequency External RC Oscillator Resistance Symbol Top VDD VDDI fXT fCM ROS Condition -- -- -- -- VDD = 1.2 to 2.7 V VDD = 1.5 to 2.7 V VDD = 1.2 to 2.7 V VDD = 1.5 to 2.7 V Range -20 to +70 0.9 to 2.7 0.9 to 5.5 30 to 35 300k to 500k 200k to 1M 100 to 300 50 to 300 Unit C V V kHz Hz kW
* When backup is not used
(VSS = 0 V) Parameter Operating Temperature Operating Voltage Crystal Oscillation Frequency Ceramic Oscillation Frequency Symbol Top VDD VDDI fXT fCM Condition -- -- -- -- VDD = 1.8 to 5.5 V VDD = 2.2 to 5.5 V VDD = 2.7 to 5.5 V VDD = 1.8 to 5.5 V External RC Oscillator Resistance ROS VDD = 2.2 to 5.5 V VDD = 2.7 to 5.5 V Range -20 to +70 1.8 to 5.5 1.8 to 5.5 30 to 35 300k to 500k 300k to 1M 200k to 2M 100 to 300 50 to 300 30 to 300 kW Hz Unit C V V kHz
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Semiconductor
MSM63182
ELECTRICAL CHARACTERISTICS
DC Characteristics
Parameter VDD2 Voltage VDD2 Voltage Temperature Deviation VDD1 Voltage VDD3 Voltage (VDD = VDDI = 0.9 to 5.5 V, VSS = 0 V, Ta = -20 to +70C unless otherwise specified) MeaSymbol Condition Min. Typ. Max. Unit suring Circuit 1/5 bias, 1/4 bias V VDD2 1.7 1.8 1.9 (Ta = 25C) DVDD2 VDD1 VDD3 -- 1/5 bias, 1/4 bias 1/5 bias 1/4 bias (connect VDD3 and VDD2) VDD4 Voltage VDD5 Voltage VDD4 VDD5 1/5 bias 1/4 bias 1/5 bias 1/4 bias High-speed clock oscillation stopped VDD = 1.5 V High-speed clock oscillation (Ceramic oscillation, 1 MHz) VDD = 1.5 V High-speed clock oscillation stopped High-speed clock oscillation (VDD = 1.2 to 5.5 V) Oscillation start time: within 5 seconds Backup Backup not used -- -- -- CSA2.00MG (Murata MFG.-make) used VDD = 3.0 V -- VDD = 1.5 V VDD = 3.0 V VDD = 1.5 V VDD = 3.0 V -- -4 -- mV/C V V Typ.- 0.2 1/2 VDD2 Typ.+ 0.2 Typ.- 0.3 3/2 VDD2 Typ.+ 0.3 Typ.- 0.2 VDD2 Typ.+ 0.2
Typ.- 0.4 2 VDD2 Typ.+ 0.4 Typ.- 0.3 3/2 VDD2 Typ.+ 0.3 Typ.- 0.5 5/2 VDD2 Typ.+ 0.5 Typ.- 0.4 2 VDD2 Typ.+ 0.4 2.8 -- 3.0
V V
V
VDDH Voltage (Backup used)
VDDH
2.0
--
2.7
V 1
1.0 1.2 1.0 0.9 1.7 0.1 5 20 -- 8 0.0 0.0 1.2 2.0
1.5 -- -- -- -- -- -- 25 30 12 -- -- -- --
2.0 5.5 -- -- -- 5.0 25 30 -- 16 0.4 0.7 1.5 3.0
V V V V V ms pF pF pF pF V V V V
VDDL Voltage
VDDL
Crystal Oscillation Start Voltage Crystal Oscillation Hold Voltage Crystal Oscillation Stop Detect Time External Crystal Oscillator Capacitance Internal Crystal Oscillator Capacitance External Ceramic Oscillator Capacitance Internal RC Oscillator Capacitance POR Voltage Non-POR Voltage
VSTA VHOLD TSTOP CG CD CL0, 1 COS VPOR1 VPOR2
Notes: 1. "TSTOP" indicates that if the crystal oscillator stops over the value of TSTOP, the system reset occurs. 2. "POR" denotes Power On Reset. 3. "VPOR1" indicates that POR occurs when VDD falls from VDD to VPOR1 and again rises up to VDD. 4. "VPOR2" indicates that POR does not occur when VDD falls from VDD to VPOR2 and again rises up to VDD. 16/27
Semiconductor DC Characteristics (continued) * When backup is used
MSM63182
Parameter
Supply Current 1
(VDD = VDDI = 1.5 V, VSS = 0 V, Ta = -20 to +70C unless otherwise specified) MeaSymbol Condition Min. Typ. Max. Unit suring Circuit CPU is in HALT state. mA IDD1 (High-speed clock oscillation -- 7.0 35 stopped) CPU is in HALT state. LCD is in Power Down mode. (High-speed clock oscillation stopped) CPU is in operating state. (High-speed clock oscillation stopped) CPU is in operation at high-speed oscillation (RC oscillation, ROS = 51 kW) CPU is in operation at high-speed oscillation (Ceramic oscillation, 1 MHz)
Supply Current 2
IDD2
--
5.5
30
mA 1
Supply Current 3
IDD3
--
24
40
mA
Supply Current 4
IDD4
--
600
800
mA
Supply Current 5
IDD5
--
700
900
mA
* When backup is not used
(VDD = VDDI = 3.0 V, VSS = 0 V, Ta = -20 to +70C unless otherwise specified) MeaSymbol Condition Min. Typ. Max. Unit suring Circuit CPU is in HALT state. mA 3.0 20 IDD1 (High-speed clock oscillation -- stopped) CPU is in HALT state. LCD is in Power Down mode. (High-speed clock oscillation stopped) CPU is in operating state. (High-speed clock oscillation stopped) CPU is in operation at high-speed oscillation (RC oscillation, ROS = 51 kW) CPU is in operation at high-speed oscillation (Ceramic oscillation, 2 MHz)
Parameter
Supply Current 1
Supply Current 2
IDD2
--
2.0
18
mA
Supply Current 3
IDD3
--
11
20
mA
1
Supply Current 4
IDD4
--
450
600
mA
Supply Current 5
IDD5
--
850
1000
mA
17/27
Semiconductor DC Characteristics (continued)
MSM63182
Parameter Output Current 1 (P4.0 to P4.3) (P5.0 to P5.3) (P6.0 to P6.3) (PA.0 to PA.3)
Symbol
(VDD = VDDI = VDDH = 3.0 V, VSS = 0 V, VDD1 = 1.1 V, VDD2 = 2.2 V, VDD3 = 3.3 V, VDD4 = 4.4 V, VDD5 = 5.5 V, Ta = -20 to +70C unless otherwise specified) MeaCondition Min. Typ. Max. Unit suring Circuit VDDI = 1.5 V -2.0 -5.0 -8.0 0.2 1.0 1.5 -2.5 -6.0 -9.0 0.4 2.0 3.0 -- 4 -- 4 -- 4 -- 4 -- 4 -2.5 -3.5 0.75 1.0 -300 -450 60 100 -- -1.2 -3.0 -4.0 1.2 3.0 4.0 -1.3 -4.0 -5.5 1.3 4.0 5.5 -- -- -- -- -- -- -- -- -- -- -1.5 -2.0 1.5 2.0 -180 -280 120 200 -- -0.2 -1.0 -1.5 2.0 5.0 8.0 -0.4 -2.0 -3.0 2.5 6.0 9.0 -4 -- -4 -- -4 -- -4 -- -4 -- -0.75 -1.0 2.5 3.5 -60 -100 300 450 0.3 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA 2 VOH1 = VDDI - 0.5 V VDDI = 3.0 V VDDI = 5.0 V VDDI = 1.5 V
IOH1
IOL1 Output Current 2 (BD, BDB) IOH2
VOL1 = 0.5 V
VDDI = 3.0 V VDDI = 5.0 V VDD = 1.5 V
VOH2 = VDD - 0.7 V
VDD = 3.0 V VDD = VDDH = 5.0 V VDD = 1.5 V
IOL2 Output Current 3 (SEG0 to SEG31) (COM1 to COM16) IOH3 IOHM3 IOHM3S IOMH3 IOMH3S IOML3 IOML3S IOLM3 IOLM3S IOL3 Output Current 4 (OSC1) IOH4R IOL4R IOH4C IOL4C Output Leakage (P4.0 to P4.3) (P5.0 to P5.3) (P6.0 to P6.3) (PA.0 to PA.3)
VOL2 = 0.7 V
VDD = 3.0 V VDD = VDDH = 5.0 V
VOH3 = VDD5 - 0.2 V (VDD5 level) VOHM3 = VDD4 + 0.2 V (VDD4 level) VOHM3S = VDD4 - 0.2 V (VDD4 level) VOMH3 = VDD3 + 0.2 V (VDD3 level) VOMH3S = VDD3 - 0.2 V (VDD3 level) VOML3 = VDD2 + 0.2 V (VDD2 level) VOML3S = VDD2 - 0.2 V (VDD2 level) VOLM3 = VDD1 + 0.2 V (VDD1 level) VOLM3S = VDD1 - 0.2 V (VDD1 level) VOL3 = VSS + 0.2 V (VSS level) VOH4R = VDDH - 0.5 V VDD = VDDH = 3.0 V (RC oscillation) VOL4R = 0.5 V (RC oscillation) (ceramic oscillation) VOL4C = 0.5 V (ceramic oscillation) VOH = VDDI VDD = VDDH = 5.0 V VDD = VDDH = 3.0 V VDD = VDDH = 5.0 V VDD = VDDH = 5.0 V VDD = VDDH = 3.0 V VDD = VDDH = 5.0 V
VOH4C = VDDH - 0.5 V VDD = VDDH = 3.0 V
IOOH
IOOL
VOL = VSS
-0.3
--
--
mA
18/27
Semiconductor DC Characteristics (continued)
MSM63182
Parameter Input Current 1 (P0.0 to P0.3) (P1.0 to P1.3) (P8.0 to P8.3) (P9.0 to P9.3) (PA.0 to PA.3)
Symbol
(VDD = VDDI = VDDH = 3.0 V, VSS = 0 V, VDD1 = 1.1 V, VDD2 = 2.2 V, VDD3 = 3.3 V, VDD4 = 4.4 V, VDD5 = 5.5 V, Ta = -20 to +70C unless otherwise specified) MeaCondition Min. Typ. Max. Unit suring Circuit VIH1 = VDDI (when pulled down) VIL1 = VSS (when pulled up) VDDI = 1.5 V VDDI = 3.0 V VDDI = 5.0 V VDDI = 1.5 V VDDI = 3.0 V VDDI = 5.0 V 2 30 70 -30 -180 -600 0.0 -1.0 -200 -600 0.0 -1.0 0.1 0.75 -1.0 -3.0 10 150 0.5 -1.0 VDD = 1.5 V 50 0.5 1.25 -1.0 VDD = 3.0 V VDD = VDDH = 5.0 V 10 90 250 -10 -90 -250 -- -- -110 -350 -- -- 0.5 1.5 -0.5 -1.5 50 350 1.0 -- 150 1.0 2.5 -- 30 180 600 -2 -30 -70 1.0 0.0 -30 -150 1.0 0.0 1.0 3.0 -0.1 -0.75 80 600 2.0 0.0 300 1.5 4.0 0.0 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA 3
IIH1
IIL1 IIH1Z IIL1Z
VIH1 = VDDI (in a high impedance state) VIL1 = VSS (in a high impedance state) VIL2 = VSS (when pulled up) VDD = VDDH = 3.0 V VDD = VDDH = 5.0 V
Input Current 2 (OSC0) IIL2 IIH2R IIL2R IIH2C IIL2C Input Current 3 (RESET) IIH3 IIL3 Input Current 4 (TST1, TST2) IIH4 IIL4
VIH2R = VDDH (RC oscillation) VIL2R = VSS (RC oscillation) VIH2C = VDDH VIL2C = VSS VDD = VDDH = 3.0 V VDD = VDDH = 3.0 V VDD = 1.5 V VIH3 = VDD VIL3 = VSS VIH4 = VDD VIL4 = VSS VDD = 3.0 V VDD = VDDH = 5.0 V (ceramic oscillation) VDD = VDDH = 5.0 V (ceramic oscillation) VDD = VDDH = 5.0 V
19/27
Semiconductor DC Characteristics (continued)
MSM63182
Parameter Input Voltage 1 (P0.0 to P0.3) (P1.0 to P1.3) (P8.0 to P8.3) (P9.0 to P9.3) (PA.0 to PA.3) Input Voltage 2 (OSC0)
(VDD = VDDI = VDDH = 3.0 V, VSS = 0 V, VDD1 = 1.1 V, VDD2 = 2.2 V, VDD3 = 3.3 V, VDD4 = 4.4 V, VDD5 = 5.5 V, Ta = -20 to +70C unless otherwise specified) MeaSymbol Condition Min. Typ. Max. Unit suring Circuit VDDI = 1.5 V VIH1 VDDI = 3.0 V VDDI = 5.0 V VDDI = 1.5 V VIL1 VDDI = 3.0 V VDDI = 5.0 V VIH2 VIL2 VDD = VDDH = 3.0 V VDD = VDDH = 5.0 V VDD = VDDH = 3.0 V VDD = VDDH = 5.0 V VDD = 1.5 V VIH3 VDD = 3.0 V VDD = VDDH = 5.0 V VDD = 1.5 V VIL3 VDD = 3.0 V VDD = VDDH = 5.0 V 1.2 2.4 4.0 0.0 0.0 0.0 2.4 4.0 0.0 0.0 1.35 2.4 4.0 0.0 0.0 0.0 0.05 0.2 0.25 0.05 0.2 0.25 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 0.1 0.5 1.0 0.1 0.5 1.0 1.5 3.0 5.0 0.3 0.6 1.0 3.0 5.0 0.6 1.0 1.5 3.0 5.0 0.15 0.6 1.0 0.3 1.0 1.5 0.3 1.0 1.5 V V V V V V V V V V V V V V V V V V V V V V 4
Input Voltage 3 (RESET, TST1, TST2)
Hysteresis Width 1 (P0.0 to P0.3) (P1.0 to P1.3) (P8.0 to P8.3) (PA.0 to PA.3) Hysteresis Width 2 (RESET, TST1, TST2) Input Pin Capacitance (P0.0 to P0.3) (P1.0 to P1.3) (P8.0 to P8.3) (P9.0 to P9.3) (PA.0 to PA.3)
VDDI = 1.5 V DVT1 VDDI = 3.0 V VDDI = 5.0 V VDD = 1.5 V DVT2 VDD = 3.0 V VDD = VDDH = 5.0 V
CIN
--
--
--
5
pF
1
20/27
Semiconductor Measuring circuit 1
MSM63182
CB1 Cb12 CB2 C1 C12 C2 q *1 w OSC0 OSC1 VSS VDD VDDI VDD1 A Ca V Ca, Cb, Cc, Cd, Ce, Cl, C12 Cb12, Ch CG CL0 CL1 Ceramic Resonator VDD2 Cb V VDD3 Cc V VDD4 Cd V VDD5 Ce V VDDH VDDL Ch V Cl V XT0 XT1
CG
32.768 kHz Crystal
: 0.1 mF : 1 mF : 15 pF : 30 pF : 30 pF : CSA2.00MG (2 MHz) CSB1000J (1 MHz) (Murata MFG.-make)
*1 RC Oscillator q ROS w Ceramic Oscillator q CL0 CL1 Ceramic Resonator w
Measuring circuit 2
*3 VIH
*2 INPUT OUTPUT
A
VIL
VSS
VDD VDDI VDD1 VDD2 VDD3 VDD4 VDD5 VDDH VDDL
*2 Input logic circuit to determine the specified measuring conditions. *3 Measured at the specified output pins.
21/27
Semiconductor Measuring circuit 3
*4
MSM63182
A INPUT OUTPUT
VSS VDD VDDI VDD1 VDD2 VDD3 VDD4 VDD5 VDDH VDDL
Measuring circuit 4
VIH Waveform Monitoring *4 INPUT OUTPUT
VIL
VSS
VDD
VDDI VDD1 VDD2 VDD3 VDD4 VDD5 VDDH VDDL
*4 Measured at the specified input pins.
22/27
Semiconductor AC Characteristics (External Memory Interface)
MSM63182
(VDD = 0.9 to 5.5 V, VDDH = 1.8 to 5.5 V, VSS = 0 V, VDDI = 5.0 V, Ta = -20 to +70C unless otherwise specified) (1) Reading from External Memory
(a) When CPU operates at 32.768 kHz Parameter Read Cycle Time RD Output Delay Time Output Valid Time
External Memory Output Delay Time
Symbol tRC tOE tOHA tDO
Condition -- -- -- --
Min. -- -- -- --
Typ. 61.0 -- -- --
Max. -- 5.0 5.0 5.0
Unit ms ms ms ms
(b) When CPU operates at 2 MHz (VDDH = 2.7 to 5.5 V) Parameter Read Cycle Time RD Output Delay Time Output Valid Time
External Memory Output Delay Time
Symbol tRC tOE tOHA tDO
Condition -- -- -- --
Min. 1.0 -- -- --
Typ. -- -- -- --
Max. -- 100 100 150
Unit ms ns ns ns
AC characteristics timing ("H" level = 4.0 V, "L" level = 1.0 V)
MOVXB obj, xadr16 MOVXB obj, [RA] S1 System clock tRC P7 - P4 (A15 - A0) P8.0 (RD) tOE PA, P9 (D7 - D0) Port setup value Input data tDO tOHA Port setup value 5 V (VDDI) 0 V (VSS) Port setup value Address output Port setup value 5 V (VDDI) 0 V (VSS) 5 V (VDDI) 0 V (VSS) S2 S1 S2 S1 S2
23/27
Semiconductor (2) Writing to External Memory
(a) When CPU operates at 32.768 kHz Parameter Write Cycle Time Address Setup Time Write Time Write Recovery Time Data Setup Time Data Hold Time Symbol tWC tAS tW tWR tDS tDH Condition -- -- -- -- -- -- Min. -- -- -- -- -- -- Typ. 61.0 30.5 15.3 15.3 45.8 15.3
MSM63182
Max. -- -- -- -- -- --
Unit ms ms ms ms ms ms
(b) When CPU operates at 2 MHz (VDDH = 2.7 to 5.5 V) Parameter Write Cycle Time Address Setup Time Write Time Write Recovery Time Data Setup Time Data Hold Time Symbol tWC tAS tW tWR tDS tDH Condition -- -- -- -- -- -- Min. 1.0 0.4 0.2 0.2 0.7 0.2 Typ. -- -- -- -- -- -- Max. -- -- -- -- -- -- Unit ms ms ms ms ms ms
AC characteristics timing ("H" level = 4.0 V, "L" level = 1.0 V)
MOVXB [RA], obj or MOVXB xadr16, obj S1 System clock tWC P7 - P4 (A15 - A0) PA, P9 (D7 - D0) Port setup value Address output Port setup value 5 V (VDDI) 0 V (VSS) 5 V (VDDI) 0 V (VSS) 5 V (VDDI) 0 V (VSS) tAS tW tWR S2 S1 S2 S1 S2
Port setup value
Output data tDS tDH
Port setup value
P8.1 (WR)
24/27
Semiconductor
MSM63182
APPLICATION CIRCUITS
*RC oscillation is selected as high-speed oscillation. *Ports are powered from external memory power source. *Cv is an IC power supply bypass capacitor. *Values of Ca, Cb, Cc, Cd, Ce, Cl, Cb12, C12, Ch, and CG, are for reference only. SEG0-31 OSC0 ROS 5 to 25 pF 1.5 V Ch 1.0 mF XT1 VDDH VDD Cv 0.1 mF Cb12 1.0 mF Cl 0.1 mF Ce Cd Cc Cb Ca C12 0.1 mF 0.1 mF 0.1 mF 0.1 mF 0.1 mF 0.1 mF Push SW Open Buzzer C2 RESET TST1 TST2 BD BDB VSS CB1 CB2 VDDL VDD5 VDD4 VDD3 VDD2 VDD1 C1 OSC1
LCD
Crystal 32.768 kHz CG
COM1-16 XT0
P5.3 P5.2 P5.1 P5.0 P4.3 P4.2 P4.1 P4.0
SW Matrix (8 8)
MSM63182
P1.3 P1.2 P1.1 P1.0 P0.3 P0.2 P0.1 P0.0
VDDI VDD P4-7 P9, PA P8.0 P8.1 A15-0 External D7-0 Memory RD (64K 8 bits) WR VSS 5.0 V
Note: VDDI is the power supply pin for the input, output, and input-output ports. Be sure to connect the VDDI pin either to the positive power supply pin (VDD) of this device or to the positive power supply pin of the external memory. Application Circuit Example with Power Supply Backup
25/27
Semiconductor
MSM63182
APPLICATION CIRCUITS (continued)
*Ceramic oscillation is selected as high-speed oscillation. *Ports, external memory, and IC share their power supply. *Cv is an IC power supply bypass capacitor. *Values of Ca, Cb, Cc, Cd, Ce, Cl, C12, CG, CL0, and CL1 are for reference only. SEG0-31 OSC0 OSC1 CL1 30 pF CL0 30 pF Ceramic Resonator (Example: 1 MHz)
LCD
Crystal 32.768 kHz CG 5 to 25 pF VDD 5.0 V
COM1-16 XT0 XT1 VDDH VDD
Cv 0.1 mF Open Cl 0.1 mF Ce Cd Cc Cb Ca C12 0.1 mF 0.1 mF 0.1 mF 0.1 mF 0.1 mF
CB1 CB2 VDDL VDD5 VDD4 VDD3 VDD2 VDD1 C1
P5.3 P5.2 P5.1 P5.0 P4.3 P4.2 P4.1 P4.0
SW Matrix (8 8)
MSM63182
0.1 mF Push SW Open C2 RESET TST1 TST2 BD BDB VSS
P1.3 P1.2 P1.1 P1.0 P0.3 P0.2 P0.1 P0.0
Buzzer
VDDI VDD P4-7 P9, PA P8.0 P8.1 A15-0 External D7-0 Memory RD (64K 8 bits) WR VSS
VDD
Note: VDDI is the power supply pin for the input, output, and input-output ports. Be sure to connect the VDDI pin either to the positive power supply pin (VDD) of this device or to the positive power supply pin of the external memory. Application Circuit Example with No Power Supply Backup
26/27
Semiconductor
MSM63182
PACKAGE DIMENSIONS
(Unit : mm)
QFP128-P-1420-0.50-K
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 1.19 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 27/27

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